Welcome to the Random Number Generator using Asynchronous Counter project! This repository contains the project report and details for the implementation of a random number generator using an ...

Abstract: In the present work, a low-power, high-performance asynchronous counter is designed, implemented and simulated using reversible logic. This reversible logic gates such as Feynman, Fredkin ...

Install MPLAB (IDE and Builder) and Proteus 7 (Microcontroller Visual Simulator). (Optional) Build a new .HEX file in MPLAB using the source code. (Or use already built file by me.) Open the Proteus ...

Abstract: A testable design for an asynchronous n-bit CMOS counter is presented, with test inputs that provide full coverage for stuck-at and stuck-open faults. The test time is O(n) where the counter ...